A Hardware Organization of High-Radix Modular Multiplication for RSA Cryptosystem

Hardware organized modular multiplication based on division algorithm is one of the effective methods used for RSA encryption/decryption. This paper generalizes the hardware organization of the modular multiplication based on the higher-radix SRT division algorithm, and describes the area/time trade-off of the organization. For the number representation we used the signed-digit number system and for selecting the multiple of modular we employed the arithmetic operation instead of the conventional look-up table. The method based on the arithmetic operation is suitable for keeping the same structure over wide range of high radices. The result of the evaluation revealed that a radix-16 multiplier produced 1.5 times speedup at about 1.6 times area cost compared with radix-4 multiplier.